Designing at 65nm and below requires design tools that can handle the manufacturability challenges of smaller transistors and wires, as well as the escalating data volume and complexity of denser, more complex chips. Though less widespread, similar manufacturability risks can affect aggressive designs at larger 90nm processes. No matter which process node companies use, enhancements to the product design environment improve team productivity and project predictability.
Market predictions indicate that the amount of digital logic on a typical consumer-product ASIC will double every three years through 2020. Cadence addresses this challenge by delivering an Advanced Node Design solution with the capacity and speed required to handle large designs on the newest process nodes.
The Cadence® Advanced Node Design solution mitigates the risk in designing at advanced processes by addressing the many manufacturability considerations in the early stages of the design flow. By integrating comprehensive design-for-manufacturing analysis into the flow, the production-proven Cadence solution also optimizes designs to prevent downstream problems, eliminate re-spins, and maximize yield—at any node.
Cadence also delivers a broad array of leading custom IC design solutions to help customers achieve volume production of large, complex designs at 65nm and below. These technologies provide tighter manufacturability integration, improved yield and parasitic analysis, and performance-boosting simulation capabilities for fast and accurate verification of advanced designs.